Fig Forth, has everything but a PDP 8 covered for small micros.
Oddly no IBM 1130 version.
https://www.forth.org/fig-forth/contents.html

I wish I had found that page a few years ago. It is too bad the listings need to be OCR scanned.

The port I made is 10kB instead of 8kB, but for the rf6809 I used 24-bit addressing and 32-bit Forth words so it consumes more room. But it does allow Forth code up to 16MB.
IIRC A FAR pointer does not fit in a register (like the 6502), so there are a lot of FAR indirect jumps and pointers to manage. No doubt the Forth is somewhat slower, but it was running at 60 MHz IIRC.

I made a wrapper for the J1 so it could interface to a 64-bit bus. Tempting to add an RTX2000 to my set of emulated CPUs, maybe extending it to 64-bits. I wonder if there are any "holes" in the instruction set.

I want a 9 bit 6809.

The rf6809 looks like a nice idea, but I have the *other* brand FPGA and porting between brands never seem to work.
Is that the only 12 bit micro out there since the PDP 8 ?
Looking for a web page on a older FPGA 6809, that I wanted but could not find, I found this.
A plug in 6502 replacement.
https://hackaday.com/2021/10/15/heres-a ... placement/
Nice Idea.

Here's a quick update on the RTX2000 Development Board Project. As you may recall, I spit-balled RTX2000 CPU opcodes from the available documentation, and then created a spreadsheet "assembler" to assist with hand coding assembly language. As a test of things I created a short subroutine to transmit a serial byte from the TOP of the STACK. The serial transmission is simple bit-banging at 2400 baud N-8-1. (I'm working with a 1 MHZ clock oscillator to drive the CPU.) This seems to work OK. I attached a screenshot of the coding.

In the course of doing the coding I found that the instruction summary for the 16 bit opcodes in Koopman's book "Stack Computers" to be very helpful. I attached a photo of two pages from the book. Regards subroutines, a zero in the 16th bit of an instruction represents a call to a subroutine. (The other 15 bits are the jump address.) Likewise, a return from the subroutine can be made (in almost any instruction) by setting the 6th bit.

My next coding project will be code to receive a serial byte. I also have been toying with running cmForth on a DOS machine and attempting to compile the source code I found for cmForth on the RTX2000. Right now it's close, but not quite there. Work in progress. Thanks! Michael

So, you are cycle counting assuming 1 MHz? Do the cycle times of the instructions vary, what are they?

I see the RTX2000 has page relative branching. I had page relative branching as an option in a couple of designs but had not seen it used in another CPU. I must have picked it up subconsciously reading about the RTX2000 years ago.

It makes sense if all you can do in 1 clock tick, is load or increment the PC. A full addition may take 2 clocks.

Yes, it speeds things up and reduces the amount of logic. I am surprised more CPU do not use page-relative addressing. But I guess simple PC relative addressing may be easier to understand, and the adder delay may not matter in many cases. Then there is linking programs…. PC relative addressing allows relocation anywhere.

For the bit banging I did not count cycles. In the code I have a per-character delay by doing a string of NOPs. I tuned the number of NOPs to match the correct timing by looking at an oscilloscope trace of the serial transmission.

Harris published an application note describing how to create a software UART for the RTX2000. That may be the way I go eventually. At the moment I just wanted to get something going, and test the various opcodes.

On another subject, I have found that all 4 CPUs in my collection of parts are functional. These parts are all EBAY retreads, so I am grateful for that! Michael

Why not add a IO bus, like the one found here.
https://z80kits.com/
You have a whole bunch of cards all tested and ready to go?

All four working - that's great!

Have you looked at multi-tasking FORTH?.
One master CPU, and 3 slaves come to mind.

Here's a quick update on the RTX2000 Development Board Project. I've continued with the development of a serial interface, and subsequently decided to add UART circuitry to support the P8251A. The circuit I added is from Walter Fuller's book "Build Your Own Computer". I've attached a screenshot of the circuit from the book. Here is a link to the complete book in PDF.

https://archive.org/details/walter-full ... puter-8088

This circuit needs a clock for the baud rate, which I derive for 4800 baud by dividing the 1 MHZ clock with a counter by 16X (76,923 HZ). It was easy to interface the circuit to the RTX2000 by using the ASIC Bus Interface.

In a parallel path I have been exploring the MPE Forth Cross Compiler for the RTX series. The CD key to install the application was graciously provided by MPE. This compiler runs in a DOS environment and can target the RTX2000, RTX2001 and RTX2010. The Cross Compiler is setup to target a development that was previously offered by MPE. I attached a photo of that board. (This screenshot is from a YouTube video.)

I have also been expanding my list of RTX2000 opcodes. It's pretty amazing that so many opcodes correspond directly to Forth primitives. When I code the assembly by hand for testing it is almost like coding in Forth. Pretty neat. Michael

One thing left out is a transistor and a tiny speaker off the timer chip for beep, or music, or debug.

Thank you for this! I've always wondered about these chips, and could never find ISA documentation.

Having briefly looked through it, I have to say it looks insanely hard to use the native instructions.

I've been working on something not entirely different, the Tugman FPGA CPU core (100MHz+ 18bit instruction-per-cycle, free returns) documented elsewhere on this board. You may want to take a look at how I rigged up FasmG assembler (which is a generic assembler which lets you define instructions). I managed (poorly, but it works) to make an assembler for a very complex VLIW-like processor in about a page of macros.

In https://tildegit.org/potato/Tugman/src/branch/main/soft/tugman_syntax.asm you can see how it works. It took me a couple of hours to get there from knowing literally nothing about FasmG.