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 A TTL style computer from the 70's 
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Joined: Sat Feb 02, 2013 9:40 am
Posts: 2537
Location: Canada
How much RAM does the computer have? I am thinking it cannot be a lot for 1970's tech.
21-bits could do RGB777 colors.

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Robert Finch http://www.finitron.ca


Tue Sep 15, 2026 4:34 am WWW

Joined: Mon Oct 07, 2019 2:41 am
Posts: 994
robfinch wrote:
How much RAM does the computer have? I am thinking it cannot be a lot for 1970's tech.
21-bits could do RGB777 colors.

The system is designed around serial I/O and core memory emulation. It just does not have the speed
to do any kind of bit mapped graphics. 4.71 Mhz ( 4x clock) . I only have a 19 bit address space- 256K words of RAM lower
memory ,ROM and I/O in the upper memory. Memory is 32K words typical. I have a hidden 32K of memory
for stack and I/O buffers.

In the early 70's you only had B&W bit mapped graphics.
Xerox Alto 1973 had 96K ram and 606 × 808 pixel (portrait) display , keyboard , disk and rodent.
DG Nova instruction set. A 20 bit computer design just needs a another 4 bit, bit slice, so ignoring
timing issues, I could have system with bit mapped graphics, but that beyond my skill level in design.
This is a job for Super FPGA
Ben.


Tue Sep 15, 2026 6:10 am

Joined: Sat Feb 02, 2013 9:40 am
Posts: 2537
Location: Canada
I was thinking along the line of the TV typewriter or AppleII graphics, destined for a composite monitor or TV. Text mode may not use much memory.
I thought chip memory like 2102's were being used, but maybe that is too advanced. for 1973 ish.

With 21-bit wide memory, 7 3-bit pixels could be read in a single cycle lowering memory access requirements. The dot clock could be 7x the 1.x base clock rate.

Quote:
This is a job for Super FPGA

FPGA would make things much easier, but much less authentic.

The notion of a circuit being implementation in 1970's logic.

What is the motherboard bus like?

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Robert Finch http://www.finitron.ca


Tue Sep 15, 2026 10:08 am WWW

Joined: Mon Oct 07, 2019 2:41 am
Posts: 994
robfinch wrote:
I was thinking along the line of the TV typewriter or AppleII graphics, destined for a composite monitor or TV. Text mode may not use much memory.
I thought chip memory like 2102's were being used, but maybe that is too advanced. for 1973 ish.


This is more a hardware emulation, than a true retro design. I am cheating in few things like using a 6850 ACIA and a SD card
but I feel the design has the spirt of a TTL computer. The 21 bit computer is a after thought for for the working 20 bit computer
as it can be hacked into the 20 bit cards.
robfinch wrote:

With 21-bit wide memory, 7 3-bit pixels could be read in a single cycle lowering memory access requirements. The dot clock could be 7x the 1.x base clock rate.
FPGA would make things much easier, but much less authentic.

I disagree, with the right FPGA macros, with schematic entry the data path is well covered.
micro code ROM as the issue, as different venders do things different.
Four phase computers? had 24 bit alu and did it that way about 1975.They were leased rather than bought
so they where not well known. They also had their own custom memory and logic chips.
robfinch wrote:

What is the motherboard bus like?

A 6502 or 6800 style bus for the 6850 ACIA. Right now it is at the get it working stage.
I have a serial terminal for use when a get a stand alone system, so a video display.
using old VGA monitors, because they free was not considered with early 70's time frame.
Also they need a 25 Mhz dot clock, so the bus would need to be revised. Color and inverse video also need
to addressed, so 20 bit machine might be better since you have 8 bits for each character, and 2 bits for color.


Tue Sep 15, 2026 4:47 pm

Joined: Sun Mar 27, 2022 12:11 am
Posts: 68
To be honest video is the place to 'cheat'. Video with TTL isn't worth the effort in my opinion. It's a lot of chips to do very little very quickly. Chips and board space better spent on making the CPU more interesting. The exception is monochrome(or two colours) with shift registers. You get readable text and usable graphics plus you can pick a nice colour that won't burn you eyes from being oversaturated.

Instead, you could emulate an era appropriate graphics system or tty with a cheap microcontroller like the Pi Pico or Esp32. Have it monitor memory writes and shadow an area of RAM that can be used for graphics data or text. FPGAs are an option as well.


Wed Sep 16, 2026 2:17 am

Joined: Mon Oct 07, 2019 2:41 am
Posts: 994
I have the memory for a video display. but since I have video terminal already I will use that after I get my second serial port.
I need to think about it a bit so I can add video clock to the mother board and synchronized memory.
I am working on ~1973 logic today. The 1977 version could have a APPLE II style display. I liked the idea of a high res
window with the 4 lines of text on the bottom.


Thu Sep 24, 2026 5:58 pm

Joined: Mon Oct 07, 2019 2:41 am
Posts: 994
Revised my order code to be more the late 1960's, by having excess 3 decimal math. 40 bits will do 8 digit floating point.
8 digit floating point a design goal. 999,999.99
It is easy to hack my assembler get decimal floating point constants, thus the excess 3 math over binary floating point.
Now 7 digit octal. Boards are ready to be made. I just want to sleep overnight before shipping them off.


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Sat Sep 26, 2026 7:25 am

Joined: Mon Oct 07, 2019 2:41 am
Posts: 994
Front panel board is in and populated.The mother board PCB's expected Tuesday. Revised the CPU to use 512 x 20 roms,
This gives me a indirect on regular memory address.


Sun Oct 04, 2026 7:46 pm

Joined: Mon Oct 07, 2019 2:41 am
Posts: 994
*** kaboom ***
Well so much for having the mother board and front panel working.
Headers #2 #3 give a VCC to ground short, when connected.
I am going to drop the front panel, and jump to ROM on reset.
I plan to move the order code back to a HEXADECIMAL format
for the 20 bit cpu. Short and Quick forms will now be 128 words.
PS. Octal formats better. Short -128..127. Short 0..127.


Sat Oct 10, 2026 8:49 pm

Joined: Mon Oct 07, 2019 2:41 am
Posts: 994
Short form 0..255 ' ]'
Added indirect '@' for direct and short addressing modes.


Mon Oct 12, 2026 5:16 pm

Joined: Mon Oct 07, 2019 2:41 am
Posts: 994
Too cluttered. Gone to a simpler layout,with 16 registers rather than 8 but I need new CPU card.
PCB now out the door.


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Tue Oct 13, 2026 5:18 am

Joined: Mon Oct 07, 2019 2:41 am
Posts: 994
Code:


    SIMPLE 20 BIT COMPUTER ~1968 .. 1973
    CARRY IS THE ONLY FLAG
    8 (BASIC) OR 16 (UPGRADE) REGISTERS
  ~ 1.6 uS memory cycle

     0987 6543 2109 8765 4321     
    +----+----+----+----+----+
    | TTT COOO DDDD SSSS ####| normal
    +----+----+----+----+----+

    +----+----+----+----+----+
    | TTT COOO DDDD #### ####| quick # 
    +----+----+----+----+----+

    +----+----+----+----+----+
    | TTT ICCC DDDD .... ....| jmp condition # 
    +----+----+----+----+----+
    +----+----+----+----+----+
    |#### #### #### #### ####|   
    +----+----+----+----+----+
   
    COOO = ALU FUNCTION, C = WITH CARRY
    ICCC = CONDITION, I = INVERT CONDITION
    DDDD = DEST REGISTER
    SSSS = SOURCE OR BASE REGISTER
                   
    ALU FUNCTIONS       
    #   normal  with carry   
    0   ST                      source := R         
    1   ADD     ADC             R := R + source updates carry flag   
    2   SUB     SUB             R := R - source updates carry flag
    3   CAD     CAC             R := source - R updates carry flag   
    4   AND                     R := R & source       
    5   OR                      R := R # source
    6   XOR                     R := R $ source
    7   LD                      R := source
   
             
    TTT     INSTRUCTION TYPE       
    0       CTL,BYTE IMMEDIATE   
    1       SHIFT AC # 
    2       DISPLAY AC,JMP ON CONDITION #
    3       LOAD EFFECTIVE ADDRESS   REGISTER OPERAND S
    4       MEMORY PRE  INCREMENT S
    5       MEMORY POST INCREMENT S
    6       MEMORY S INDEXED         
    7       MEMORY S INDEXED INDIRECT
         




Wed Oct 14, 2026 5:19 am

Joined: Sat Feb 02, 2013 9:40 am
Posts: 2537
Location: Canada
It looks like there are four bits available for TTT. what happens with the other bit?

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Robert Finch http://www.finitron.ca


Wed Oct 14, 2026 1:16 pm WWW

Joined: Mon Oct 07, 2019 2:41 am
Posts: 994
robfinch wrote:
It looks like there are four bits available for TTT. what happens with the other bit?


I ran out of I/O pins on the control CPLD for that line as well as leaving that a SPARE; likely for byte/word addressing.
Right now get a word based computer running first, then software. Next summer a byte addressable machine that
could be 12/24 bits.
Ben.
PS, I plan to use a ALGOL like high level language so more registers are needed.


Wed Oct 14, 2026 5:07 pm

Joined: Mon Oct 07, 2019 2:41 am
Posts: 994
Now working on software again. A simple printf/fprintf is in the works, as I now have a ITOA working in the bios rom.
Revising a very buggy cross compiler.(it hangs on bad input). When that is done I can run the prime number sieve.
PS: the prime number sieve is now working, as well as a simple printf.
PPS: the cross compiler compiles to ~20K words when compiled by it self.I need to pack character data for symbol tables.


Sat Oct 17, 2026 11:32 pm
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