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legacy
Joined: Fri Jan 10, 2014 9:46 pm
Posts: 37
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[removed due to user inquiry]
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| Wed Jan 21, 2015 9:01 pm |
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stefanberndtsson
Joined: Wed Jul 02, 2014 9:36 pm
Posts: 32
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legacy wrote: OK, thanks
do you think it should be possible to reduce the number of DRAM chips using something like HM4864 (DRAM 64Kbyte, RAS/CAS) ? I'm not familiar with that one, but it seems to be a 64kbit x 1 (8kByte/chip), so it would require 16 chips to provide the full 128kB VRAM. The TMS4464 and D41464 is 64kbit x 4 (hence 32kByte/chip). I don't think there are any DRAM's with 64kbit x 8 which would be the only way I can see to reduce the chip count while retaining the same amount of memory.
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| Wed Jan 21, 2015 9:36 pm |
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legacy
Joined: Fri Jan 10, 2014 9:46 pm
Posts: 37
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[removed due to user inquiry]
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| Thu Jan 22, 2015 10:27 am |
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stefanberndtsson
Joined: Wed Jul 02, 2014 9:36 pm
Posts: 32
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legacy wrote: what about using just one 30-pin SIMM module ? Code: 30-pin SIMM, 256 KB capacity
30-pin SIMMS have 12 address lines, which can provide a total of 24 address bits. With an 8 bit data width, this leads to an absolute maximum capacity of 16 MB for both parity and non-parity modules (the additional redundancy bit chip usually does not contribute to the usable capacity).
30-pin SIMM Memory Module
Pin # Name Signal Description Pin # Name Signal Description
1 VCC +5 VDC 16 DQ4 Data 4
2 /CAS Column Address Strobe 17 A8 Address 8
3 DQ0 Data 0 18 A9 Address 9
4 A0 Address 0 19 A10 Address 10
5 A1 Address 1 20 DQ5 Data 5
6 DQ1 Data 1 21 /WE Write Enable
7 A2 Address 2 22 VSS Ground
8 A3 Address 3 23 DQ6 Data 6
9 VSS Ground 24 A11 Address 11
10 DQ2 Data 2 25 DQ7 Data 7
11 A4 Address 4 26 QP* Data parity out
12 A5 Address 5 27 /RAS Row Address Strobe
13 DQ3 Data 3 28 /CASP* Parity Column Address Strobe
14 A6 Address 6 29 DP* Data parity in
15 A7 Address 7 30 VCC +5 VDC
* Pins 26, 28 and 29 are not connected on non-parity SIMMs.
Actually, a 72pin SIMM might be more useful. It has 4 separate CAS lines (and RAS lines, but you should be able to connect them together), and hook all data lines together (only one bank of 8 bits would be used at a time I think). Using SRAM is possible. I've done it for a TMS9929 (where it's more complex). I think it should work with a simple latch. 128kB SRAM's are available (I use one such thing for the CPU memory with the Z80, although I only use 64kB of it). You'd probably need a pullup on the A16 pin and hook CAS1 to it to control which bank to use, and use the RAS pin for latching half the address. There are 512kB SRAM's with 5V available, but they're not as common. Samsung KM684000BLP for example might work there. Using the full 192kB may require a bit more complexity in the adress decoding though.
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| Thu Jan 22, 2015 11:44 am |
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BigEd
Joined: Wed Jan 09, 2013 6:54 pm
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(For those following at home, there's a parallel discussion on the same lines here: http://forum.6502.org/viewtopic.php?f=4&t=3158)
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| Thu Jan 22, 2015 12:16 pm |
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legacy
Joined: Fri Jan 10, 2014 9:46 pm
Posts: 37
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[removed due to user inquiry]
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| Thu Jan 22, 2015 12:50 pm |
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stefanberndtsson
Joined: Wed Jul 02, 2014 9:36 pm
Posts: 32
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legacy wrote: @stefanberndtsson
where have you bought your 64-pin SODIP breakout ?
or where do you suggest me to look for ?
i got a sim72 fast page module, and i'd like to toy with the VDU chip :D Ebay, as with most of the stuff I have. :) http://www.ebay.com/itm/1x-SDIP64-56-4m ... 1190068814 is a link to a similar one, since the exact item I bought is no longer available. I also have sockets... http://www.ebay.com/itm/20pcs-64pin-Pit ... 0999496795
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| Tue Jan 27, 2015 12:50 pm |
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legacy
Joined: Fri Jan 10, 2014 9:46 pm
Posts: 37
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[removed due to user inquiry]
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| Tue Jan 27, 2015 11:45 pm |
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stefanberndtsson
Joined: Wed Jul 02, 2014 9:36 pm
Posts: 32
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legacy wrote: good, perfect, i have ordered a pair of adaptors + their socket :D
p.s.
do you think you will finalize your PCB for the VDU ?
i am learning kicad, i have installed it on my laptop and i have been designing simple circuits
i think i will be able to produce something more complex in a few mounts
may be you will complete your VDU pcb before when i will get skilled enough :D I intend to finalize it, but I also expect it to take quite a while to get there. The current layout will most likely not be the finalized version. Especially if I'm going to move the DRAM parts over to smaller modules. This is a multi-year project for me, with no deadlines... :)
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| Wed Jan 28, 2015 10:49 am |
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legacy
Joined: Fri Jan 10, 2014 9:46 pm
Posts: 37
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[removed due to user inquiry]
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| Wed Jan 28, 2015 12:29 pm |
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stefanberndtsson
Joined: Wed Jul 02, 2014 9:36 pm
Posts: 32
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legacy wrote: and what do you think if i will ask a service to produce a PCB with your actual VDU pcb ?
do you trust it is good enough to be working fine ?
i am also designing a VDU in fpga, text base only at the moment, with with scroll X and Y
i am busy with an other project, the TAP machine of a debug-processor, a very time consuming project, this is the reason am asking you about pcb: too few skills at the moment, ad a few half an hours a day No, I can't say I trust it. The current layout is completely untested so far. I'm only going to produce layouts for my own personal use. If you or anyone else wants to use my stuff, that's always fine by me, but I will only do things for my own projects, since this is purely a hobby.
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| Wed Jan 28, 2015 2:21 pm |
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