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DockLazy
Joined: Sun Mar 27, 2022 12:11 am
Posts: 58
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For examples of DOS. Unix version 6 and in particular the book "A Commentary on the Sixth Edition UNIX Operating System by John Lions" is probably the best resource I've found for an early 70's OS.
Apart from that, C/PM has it's BIOS writing guide and the source itself is available but not very readable.
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| Sat Feb 03, 2024 9:18 pm |
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oldben
Joined: Mon Oct 07, 2019 2:41 am
Posts: 768
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DockLazy wrote: For examples of DOS. Unix version 6 and in particular the book "A Commentary on the Sixth Edition UNIX Operating System by John Lions" is probably the best resource I've found for an early 70's OS.
Apart from that, C/PM has it's BIOS writing guide and the source itself is available but not very readable. Both systems have flaws. CP/M was designed for a 256 kb floppy and Unix 3 was designed for multi user with disk swapping. DEC RT 11 (PDP 11) is more what I am looking for, but all have a tiny program/data space of 64kb. (32K words). George III for the ICL 1900 really is good example of 60's operating system, as it had cards,paper tape,mag tape,and removable hard disks and printers and video and hardcopy terminals that is of historical interest. I suspect it all ran in 32K words with swapping. The evil mind thinks of running ICL emulator and porting BCPL to the EVIL computer. I fixed a few more bugs, today but still have problems.
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| Sat Feb 03, 2024 10:43 pm |
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oldben
Joined: Mon Oct 07, 2019 2:41 am
Posts: 768
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Well new MAX 232's are exploding left and right. I hand to use a junk box find, that works.
My skip opcode seemed flakey, so I replaced my HCT/ALS chips with 74LS parts that I found
looking for max 3232 chip, for less noise. Now my quick and dirty boot loader, works with out flying into LA-LA
land. I need to now add another 32K RAM card so I have 32K for user space,and 32K O/S space + 16K rom.
Ben.
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| Fri Feb 09, 2024 5:54 am |
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DockLazy
Joined: Sun Mar 27, 2022 12:11 am
Posts: 58
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HCT are pretty bad for noise. They have low voltage swing of TTL but with high impedance CMOS inputs, makes for the worst of both worlds.
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| Fri Feb 09, 2024 6:27 am |
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oldben
Joined: Mon Oct 07, 2019 2:41 am
Posts: 768
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Just in time, a better mother board. 2 oz copper and better switches.
I would love it to be base 8, but only Sexadecimal fits the PCB, for a 24 bit binary CPU.
"Alpine Computer 1"
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| Sat Feb 10, 2024 9:51 pm |
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oldben
Joined: Mon Oct 07, 2019 2:41 am
Posts: 768
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Code: 00000
00000 / HELLO WORLD PROGRAM
00000 / ALPINE 1
00000 GETC SET $FF8009
00000 PUTC SET $FF800A
00000 CRLF SET $FF800B
00000
00000 RIM
00300 ORG $300
00300 1C030A LD X # STR
00301 C8800B JSR A # CRLF
00302 LOOP
00302 130000 LD A X 0
00303 2C0001 ADD X #1
00304 710005 SNE A
00305 780308 JMP A # EXIT
00306 C8800A JSR A # PUTC
00307 780302 JMP A # LOOP
00308 EXIT
00308 C8800B JSR A # CRLF
00309 000002 HLT A
0030A
0030A 000048
0030B STR DW 'H
0030B 000065
0030C DW 'e
0030C 00006C
0030D DW 'l
0030D 00006C
0030E DW 'l
0030E 00006F
0030F DW 'o
0030F 00002C
00310 DW 44 / ,
00310 000020
00311 DW 32 / SPACE
00311 000057
00312 DW 'W
00312 00006F
00313 DW 'o
00313 000072
00314 DW 'r
00314 00006C
00315 DW 'l
00315 000064
00316 DW 'd
00316 000021
00317 DW '!
00317 000000
00318 DW 0
00318
00000 END
1st mile stone, working ABS loader. (Bootstrap)
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| Sun Feb 11, 2024 11:15 pm |
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BigEd
Joined: Wed Jan 09, 2013 6:54 pm
Posts: 1821
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Well done!
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| Mon Feb 12, 2024 9:06 am |
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oldben
Joined: Mon Oct 07, 2019 2:41 am
Posts: 768
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Now for the bug fix PCB's. More caps and better layout.
4 bit alu, using PAL's.
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| Mon Feb 12, 2024 6:48 pm |
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oldben
Joined: Mon Oct 07, 2019 2:41 am
Posts: 768
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and A revamped memory/Io card. IDE interface is 12 bits wide now. Acia has its own clock.
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| Tue Feb 13, 2024 2:54 am |
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oldben
Joined: Mon Oct 07, 2019 2:41 am
Posts: 768
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Fixed a few bugs, in the cross assembler with emited code.
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| Fri Feb 16, 2024 7:03 am |
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oldben
Joined: Mon Oct 07, 2019 2:41 am
Posts: 768
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While waiting for the new PCBs I am drafting out a new control section using TTL logic and 28C16s as prom replaments.
Some decoding changed to permit better use of TTL logic. I saved 1 logic gate. Some parts had to be changed to 74Fxx
to meet timing, as the 28C16s are 70 ns slower than bipolar proms. 3 1024x8 proms are used in the design now,
and lots 74ls153s and 74ls161s and 74163s (No PALs here). Revised timing is .9 uS clock cycle, or 1.8 uS for a memory read.
Writes add 1 cycle more. I hope to have the PCB's in by the weekend.
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| Thu Feb 22, 2024 6:15 am |
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oldben
Joined: Mon Oct 07, 2019 2:41 am
Posts: 768
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Now waiting for some last minute parts. I have a few ideas for a 20/10 bit cpu?
8 1/4 " x 5 1/4 inches for the alu card.
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| Mon Feb 26, 2024 4:25 pm |
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oldben
Joined: Mon Oct 07, 2019 2:41 am
Posts: 768
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Had a logic issue with the front panel switches on the new mother board.
Now working on the compact flash software.
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| Fri Mar 08, 2024 8:03 am |
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oldben
Joined: Mon Oct 07, 2019 2:41 am
Posts: 768
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The compact flash seems to work. I have a paper tape bootstrap and now a disk bootstrap.
I read 1K blocks, of 12 bits, but pack that into 512 words. I read block 0 at 0x000300
and jump to it for my disk boot.
Right now I am using a fake IBM 2315 disk cartridge - 3 sectors of 512 (24 bit) words per track
using some sort of GCR ,3072 12 bit words. A PDP-8 gets 4096 12 bit words. The orginal IBM
format is 2560 8 bit words.
I am about the same state system wise I was in May 2023 using a FPGA, but here I have better chance
upgrading my I/O and memory.
24 bits is just ample to fit the order code, with 4 registers and two addessing modes and to have more than
a 32K (word) address space. I may use FAT style disk layout if I use the disk cartridge as floppy style system.
IBM 1130 style computer for now.
Ben.
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| Sat Mar 09, 2024 9:48 am |
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oldben
Joined: Mon Oct 07, 2019 2:41 am
Posts: 768
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Bad news, I am stuck with 256 word sectors for the compact flash.
Good news, I have another 32K words of ram.
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| Sun Mar 10, 2024 7:45 am |
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