Looks good. Is the front panel part of the main board? What if you decide to change it again?

For my CPU project I put together an ISA motherboard, figuring it was low cost and pre-designed / made.
I am not using the ISA bus signals though. I defined my own use of the signal lines.

Can those TIL311's be driven in a serial fashion, from a 4-pin serial interface for instance?

The stuff mostly works, is more bug fix type problems. The mother board is just too cramped for easy
debugging from the front panel, as well as the leds are too bright. The new mother board is octal
output so I don't have think is that a 3 or a 6 when I glance at the row of leds. The toggle switches
flip nicer than slide switches.

Once all the memory and I/O is working, I can remove the front panel logic, and boot into rom.
I need more CPLD's for that to go on the old ALU card.

The TIL311's latch the input, so a nibble serial data bus is possible. They are power hungry at
about 180 ma each chip.

I know how to save a TIL311, build a 20 bit cpu and use hex logic
The ALU CPLD's have been hacked from 9 to 10 bits and seem to compile ok.
Front panel switches will run thru a ribbon connector, and bits 19,20 will take their
place on the bus connector. 19 bits of addressing, 20 bit data.
A possible later date project.


*“640 KB ought to be enough,”* but only with small sized 0's and 1's.

Having problems with the new memory cards, byte addressing was not working.
Tried a whole lot of things at once to fix it, but not sure what did the fix.
It seems to be working now, but will it work tomorrow?
I also removed all the extra features, to give the basic 1969 instruction set.
Same memory speed.

Word addressing worked, but byte did not?

The 9 bit bytes maybe do not help. I think there may be magical incantations against anything not 8-bits.
That is how I explain away a lot of issues I run into until I find the real one.

I have been tempted to go with 10-bit bytes as that allows ECC by using 16-bit memory cells.
12-bit bytes also have a lot of nice features. 12/24 bpp video and 48-bit CPUs. rf6809 supports 8 or 12-bit operation.
But 8-bit bytes are "the standard".

Byte addressing is a bit more tricky, than word addressing so I may have had issues with the programmed logic.
It seems even CPLD's have routing timing issues.

Only IBM said 8 bits were standard as bytes, with their.EBCDIC.
ASCII is a 7 bit code.
I say 4 bit micro's really needed to be 5 bits, 1 BCD digit and a flag bit.
10 bit bytes would have made sense.

New motherboard, with octal display.
Need to program the 22v10's, after a break.
... The new mother board works
my hello world program prints "The quick brown dog jumps over the lazy fox 123456"
The octal display makes it easy to see where the program is waiting for input.

I hacked the ALU board so I now can scale addresses by 2, if I want to do a word
addressable computer as a later project.

Mother board of the day.
Front panel will display PC and AC in octal.
PPP PPP
AAA AAA
SSS SSS

Draft of the front panel. IDC connectors need to be fixed for right angle and correct twist.

Looks good. Could you use something like an FDC cable for connection?

Yes standard ribbon connector, 26 pins. 2x13.
Now that it seems to work, I need to make a case for this and a front panel,
and then wait for parts to come in, around the end of the year.
The computer is 2 amps, and the front panel is 1 amp.

Paleocene Computer's
What else can I call a late 1960's era cpu. The PCB's are out the
door for a remote front panel. While waiting for parts, I can finish
testing the Compact Flash card.
Control section CPLD, is having routing problems if I make any new
changes. Other than IRQ service needing testing, I think the design mostly works
but more testing can be done.

I need a fresh start on the CF interface, some sneaky bug there.
So a good night sleep, for today.

no rest for the wicked.
Having problems with shifting, so I changed the logic to use 74F219 (ram)
compared to the very slow 74LS189's.
I bumped up the clock from 9.8 Mhz to 11.04 Mhz, to get 1973 core speeds.
~1.4 uS memory cycle time. ( .725 uS clock)
Added a lock flag, to enable or disable interupts, on top of the IRQ enable flag,
Added a shift x 2 as well as the shift x 1
This may not be good modern design, but it is nice late 60's, early 70's computer.
Changed the bootstrap loader.
Susie here is good example.

The good news , the compact flash card interface works.
The bad news . the compact flash only works with hot insertion.
power cycle the machine it stops.