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oldben
Joined: Mon Oct 07, 2019 2:41 am
Posts: 817
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Added a few more features for a stack (algol) architecture.
LDP push AC and loadAC. A microcode hack that sets a psh flag,pushes ac,then clears flag for a normal load.
STI store indirect.SWT swap top of stack is planned.
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| Fri Jun 20, 2025 6:39 am |
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oldben
Joined: Mon Oct 07, 2019 2:41 am
Posts: 817
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Added two indexing operations, ATX (Add 2 * index),AFX (Add 4 * index) to simply array indexing.
I needed to make a hardware mod for this. Now PIP-69, as it has instruction set for what a one pass Algol Compiler
might need. Lea and Display operations are too complex to include.
Ben.
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| Tue Jun 24, 2025 10:18 am |
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oldben
Joined: Mon Oct 07, 2019 2:41 am
Posts: 817
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Replaced STI with NOP, and SWT with SWP.
Renamed PIP69 to PIP73.
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| Fri Jun 27, 2025 7:08 pm |
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robfinch
Joined: Sat Feb 02, 2013 9:40 am
Posts: 2402
Location: Canada
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Quote: Replaced STI with NOP, and SWT with SWP.
Renamed PIP69 to PIP73. STI=? When I see STI I think set interrupt mask, or store immediate. One can get by without a set/clear interrupt if it can be done in the interrupt controller. SWT=? SWP=? And what are the PIP's? I think the routing junctions in the FPGA are called PIP's. _________________Robert Finch http://www.finitron.ca
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| Wed Jul 02, 2025 2:42 am |
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oldben
Joined: Mon Oct 07, 2019 2:41 am
Posts: 817
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STI - Store indirect. ((R+)) = AC
PIP programed information processor, almost like PDP...
Made the interrupt enable a counter, 0,1,2 if EI increment counter, DI decrement counter.
Irq's are enabled if the counter is 2. This way I can have atomic instructions one level deep.
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| Wed Jul 02, 2025 6:44 am |
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BigEd
Joined: Wed Jan 09, 2013 6:54 pm
Posts: 1836
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Slide deck here explains a lot of FPGA implementation and terminology https://magic3007.github.io/data/talks/ ... slides.pdf(maybe a bit specific to Xilinx)
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| Wed Jul 02, 2025 6:48 am |
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oldben
Joined: Mon Oct 07, 2019 2:41 am
Posts: 817
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Got the new alu card pcb in with all the pcb patches fixed, and it does not read or write memory.
I plan to remove all the wire patches off the working ALU pcb, and revise the order code removing the need for pcb patches.
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| Tue Jul 08, 2025 11:17 am |
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oldben
Joined: Mon Oct 07, 2019 2:41 am
Posts: 817
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I got a strange bug, reading a 8 on a octal display.
Time to call it a day for debugging.
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| Wed Jul 09, 2025 7:01 am |
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robfinch
Joined: Sat Feb 02, 2013 9:40 am
Posts: 2402
Location: Canada
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Quote: I got a strange bug, reading a 8 on a octal display.
Time to call it a day for debugging. Wow! What a coincidence. I got an 8 bug too. Displaying on the screen, supposed to be the core number. Anybody else get an '8' bug? Is the decimal point lit up too? (If there is one). _________________Robert Finch http://www.finitron.ca
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| Wed Jul 09, 2025 10:09 am |
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oldben
Joined: Mon Oct 07, 2019 2:41 am
Posts: 817
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robfinch wrote: Wow! What a coincidence. I got an 8 bug too. Displaying on the screen, supposed to be the core number.
Anybody else get an '8' bug? core 0 then core 4 then core 0 ... Quote: Is the decimal point lit up too? (If there is one). only on power off. Ben.
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| Wed Jul 09, 2025 5:14 pm |
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oldben
Joined: Mon Oct 07, 2019 2:41 am
Posts: 817
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oldben wrote: robfinch wrote: Wow! What a coincidence. I got an 8 bug too. Displaying on the screen, supposed to be the core number.
Anybody else get an '8' bug? core 0 then core 4 then core 0 ... Quote: Is the decimal point lit up too? (If there is one). only on power off. Ben. Fixed my bug, output driver not driving output. Changed to a different pin on the CPLD. Now just why is my power off led not lighting? Ben.
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| Thu Jul 10, 2025 12:26 pm |
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oldben
Joined: Mon Oct 07, 2019 2:41 am
Posts: 817
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Decided to rebuild the alu board with new caps (50% larger)
Only 1 wire mod to the PCB. (old pcb version)
PCB china $20 1x
small parts $75 digikey
atf1508as $25 china 2 month delivery
74ls219 $25 china 1 month delivery
right angle header $5 (1 on hand)
total $150 not counting shipping
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| Thu Jul 10, 2025 11:29 pm |
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oldben
Joined: Mon Oct 07, 2019 2:41 am
Posts: 817
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Added back some more features, mostly just see it it would fit in the CPLD,
ATX Add 2 x index reg.
SWP ac with (R). Almost all my opcode space is filled.
Come 3 am I will have more ideas to try.
Ben.
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| Sat Jul 12, 2025 3:46 am |
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oldben
Joined: Mon Oct 07, 2019 2:41 am
Posts: 817
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oldben wrote: Added back some more features, mostly just see it it would fit in the CPLD,
ATX Add 2 x index reg.
SWP ac with (R). Almost all my opcode space is filled.
Come 3 am I will have more ideas to try.
Ben. SWP (swap) fits in the CPLD but it has a timing issue and it crashes after a few moments. After about 110 or macrocells the system is unstable, (Need to add ' Windows Crashed,sending error log file to APPLE' ) Replaced SWP with HLT, and now you can continue after a HLT. 108 macro cells. Code: JULY 2025
ALU FUNCTIONS AC IX CC SHIFT
# OPCODE FUNC
0 ST STORE A A 0 0
1 ADD/ADC ADD B B z 0
2 SUB/SBC SUB A-B C C s C /SRF
3 CAD/CAC SUB B-A D D s+z S
4 AND/ATX AND W #/W ~c 0
5 OR OR X X ~c+z 0
6 XOR XOR Y Y true C /SLF
7 LD LOAD S S true S
876 543 210 987 654 321
+---+---+---+---+---+---+
|1YO|OOO:AAA|32I|XXX:+##| AUTO/INDEXED
+-----------------------+
|0YO|OOO:AAA|###|###:###| BYTE/CTL
+-----------------------+
|1-O|OOO:AAA|001|###:...| SHIFT 0..7 is limit
+-----------------------+ counter incriments
760 000 rom
776 000 bootstrap
777 xxx io
ST OP
0 HLT REG/SCC
1 NOP SFT #
2 JSR JCC+
3 JSR JCC
4 R+ R+
5 X+# X+#
6 R+ R+
7 X+# X+#
TRAP DI,push PC,PC = 2
APRIL 2024
6 5 4 3 2 1
876 543 210 987 654 321
+---+---+---+---+---+---+
|BYO:OOO:321|AAA|XXX:+##| NORMAL
+---+---+---+---+---+---+
7 4+ ROM
7 7 IO
OP SH op store
0 ST SUB NOP SFT 1x
1 ADD ADD Z SCC SCC
2 SUB SUB C R+ R+
3 CAD SBR S X+# X+#
4 LD OR JSV+ CTL
5 OR OR Z LEA #.
6 AND AND C JCC+ JCC+
7 XOR XOR S - REG%
Alu card.
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| Sun Jul 13, 2025 2:21 am |
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oldben
Joined: Mon Oct 07, 2019 2:41 am
Posts: 817
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Forgot about increment, decrement memory so I added that in.
Having some build issues, so I am running my test program.
Have 97203 ROOT BEER Bottles ... May take a while.
16 bitters 9,999 bottles only.
Ben.
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| Tue Jul 15, 2025 6:35 am |
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