Greetings All!
per BigEd's encouragement, i'm posting some info about my DDL4 CPU:

https://hackaday.io/project/158510-ddl4-cpu

each module is design to be experimented with independently of the others. you can connect them up to breadboards to learn about each section. the project has been covered on hackaday.com and hackster.io:

https://blog.hackster.io/building-more- ... 404c85f9dd
https://hackaday.com/2018/06/30/ddl-4-i ... dular-cpu/

the ALU is a logic gate duplication of the 74181 ALU. this too has been covered on hackaday.com:

https://hackaday.com/2017/11/18/huge-74 ... nderstand/
https://hackaday.io/project/25596-mega-one-8-one

i've been really struggling with where to go with the design next, and trying to decide if there is value in tuning this for some types of computing classes...

i'd really love some feedback, even if it isn't positive!

I think that the lack of an obvious speed or area penalty when using modern programmable logic is a bad thing for young engineers.

When I was in school I had to make many digital circuits by building them up from SSI/MSI components. State machines made from discrete logic and FFs were particularly sensitive to the number of input and output transitions that the machine had. To avoid the explosion of the min terms or the max terms, changes were often necessary to the state transition tables. Unnecessary transitions were some of the lessons that such an exercise drove home.

With programmable logic, the synthesizer creates the equations, and they are seldom examined by the developers. When still using CPLDs for designs, I often had my young charges design some state machines manually using D and JK FFs, and to examine the complexity of the min terms produced to see the effect of their designs on the logic complexity. In many cases, I would have to go back to some of the basics we learned using Karnaugh maps/tables to demonstrate these effects.

Therefore, I am in favor of using basic gates to construct circuits. Modern logic simply hides these details. In many cases, the details are unimportant, but there are always edge cases where an understanding of the details may be the difference between a successful project or a failed project.

Yes, I think showing logic gates and composing them into an ALU and then a computer is a great way into seeing how things work.