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oldben
Joined: Mon Oct 07, 2019 2:41 am
Posts: 860
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I am expanding a 20 bit design to 36 bits. You have unsigned characters (9) bits or word data (36) bits.
The rough draft for the 20 bit cpu is 16 opcodes, as 128 x 16 rom.
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| Sun May 28, 2023 2:58 am |
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oldben
Joined: Mon Oct 07, 2019 2:41 am
Posts: 860
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The rom's fit into 22v10's. Modified the microcode to use 16v8's for Alu I/O, rather than 22v10's.
MMu logic is still up in the air, but the 36 bit CPU looks to fit all on single mid sized PCB. 12" x 10"?
Ben.
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| Sun May 28, 2023 9:13 pm |
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robfinch
Joined: Sat Feb 02, 2013 9:40 am
Posts: 2407
Location: Canada
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Is this using late 70's technology?
Putting any expansion connectors on the board?
_________________Robert Finch http://www.finitron.ca
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| Mon May 29, 2023 3:52 am |
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oldben
Joined: Mon Oct 07, 2019 2:41 am
Posts: 860
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More like the early 1980's. I am trying to squeze 3 1970's PCB's into 1 large PCB.
I have rethink the data path again, to get it to flow 8 bits per chip. The pal logic was designed
4 bits per chip using 4 bit wide bit slices.
Does any one make 9 bit bit wide memory
in thru the hole packaging?
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| Mon May 29, 2023 8:43 am |
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robfinch
Joined: Sat Feb 02, 2013 9:40 am
Posts: 2407
Location: Canada
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Quote: Does any one make 9 bit bit wide memory
in thru the hole packaging? Some of the old DRAM chips were 1 bit wide, so they could be combined with 4-bit wide chips to make 9 bits. There might be a cache tag RAM that is 9 or 10 bits wide. But that is probably not early 80's tech. _________________Robert Finch http://www.finitron.ca
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| Tue May 30, 2023 7:40 am |
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oldben
Joined: Mon Oct 07, 2019 2:41 am
Posts: 860
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Take 5 min break, and I lose my draft.
The design will be similar to a IBM AT ( 6.6 Mhz) and 256kb of ram.
The computer will use 2 56 pin connectors per circut board, under each 16 bit alu.
A 4 bit 2901 will be in the middle. 8" x 11" pcb seems about right for now.
Two data sizes, byte (9 bits unsigned) and word 36 bits.
22v10's will emulate 74F823's and 74827's. (9 bit d f/f and 10 bit buffers).
Ben.
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| Tue May 30, 2023 7:53 am |
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oldben
Joined: Mon Oct 07, 2019 2:41 am
Posts: 860
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This design is July xx 1984. Other than using CMOS chips, it seems buildable
(4 layer board may be needed for the large power draw) in that time frame. 22v10
's are must since bytes are 9 bits wide.
20 bits is segment size or 256K words of prgram space.
This first version will just have space for the MMU, but no logic to enable it.
Modern chips will replace the 64K x 1 drams used.
Ben.
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| Thu Jun 01, 2023 5:37 am |
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oldben
Joined: Mon Oct 07, 2019 2:41 am
Posts: 860
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Code: 1981 computer with 9 bits per byte - 36 bit bus
6.66 mhz makes use of 9 bit wide buffers and flip flops.
16 page mmu 512kb segments/ 64k drams
36 bit version 2 meg memory (MAX)
256kb memory
9 8 7 6 5 4 3 2 1
+----+----+----+----+----+----+----+----+----+
|COOO:mAAA:aXXX:SS+#:####:####:####:####:####|
+----+----+----+----+----+----+----+----+----+
A X OP CC
0 # Z ST/SN -
1 S S XOR Z
2 X X OR S
3 Y Y AND Z+S
4 A A LD/LN !C
5 B B CAD/CAC !(C+Z)
6 C C SUB/SBC T
7 D D ADD/ADC T
SN,LN NO MAP
SS 00 word
01 byte signed
10 half unigned
11 half signed
Post note, Memory is still to complex with all this byte shifting. 1 st version no mmu 0x0(6/7)0000 maps to 0x1(E/F)0000 ss 00 word ss 01 byte unsigned ss 1x reserved
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| Sat Jun 03, 2023 6:54 pm |
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oldben
Joined: Mon Oct 07, 2019 2:41 am
Posts: 860
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Really cutting back on the design hardware wise. Gone to a core style memory cycle.
Using 1988 tech to give me a 1968 design. Front panel now just POWER,run and stop.
PDP 8/e speed .6 us clock cycle, 1.2 us memory cycle. Just word addressing,18 bits mar,
36 bit bus.
Ben.
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| Thu Jun 08, 2023 7:26 pm |
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oldben
Joined: Mon Oct 07, 2019 2:41 am
Posts: 860
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Looking for cheap front panel swiches that I can mount on a pcb.
I need 36+ switches, and footprints. Any recomendations. Micro slide
switches are too small. I am also looking for a LED indicator that has the
led, dropping resistor and driver all in the same package.
You do not have the required permissions to view the files attached to this post.
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| Fri Jun 09, 2023 4:35 am |
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oldben
Joined: Mon Oct 07, 2019 2:41 am
Posts: 860
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Code: *
JUNE 9 2023 draft
36 bit CPU Ben 67 / 1988 version
No bytes 4.77 MHZ 1.25 US
CORE timing LIMITED front panel
9 8 7 6 5 1 3 2 1
+----+----+----+----+----+----+----+----+----+
|COOO:AAAA:XXXX:MAY+:####:####:####:####:####|
+----+----+----+----+----+----+----+----+----+
A OP CC
0 Z A ST -
1 S B XOR Z
2 T C OR S
3 U D AND Z+S
1 V E LD !C
5 W F CAD/CAC !(C+Z)
6 X G SUB/SBC T
7 Y H ADD/ADC T
'/' LRDE COMMENT
'*' BLOCK COMMENT BEGIN/END ONLY
#OOO OCTAL PROGRAM COUNTER
TOKENS
PROM A PRB#
tst 0001 0
ctl 0001 0
y 0002 1
wrd 000C
sx 0004 2 +- 20 bits
1 0008 3
op 2000 5'
ld 0020 5
sub 2020
no 0040 6
sft 0080 7
PROM B PRB#
by 0100 0' not used
IR 0800 3'
rd 0010 1
wr 0210 1'
pc 0000
ac 0040 3
ix 2000 5'
RD 1000 1'
sp 8000 7'
ax 2040
REAL SIMPLE CPU
(J-PAN_,ST_)(JMP_,M,A)(cnt)
0 ST_ JMP_,M A NORMAL
1 X PAN_ X X TRAP
1 X PAN_ X X PANEL
*
#000 / CTL
PC Y 1 RD
IX CTL NO IR
PC RD
PC 1 IR
#010 / JSV #
/
SP 1 SUB WR RD
PC 1 SUB WR
PC LD SX RD
PC 1 IR
#020 / JMP X
IX NO SX RD
PC IN
PC LD WRD RD
PC 1 IR
#030 / JMP A+-
IX Y SX RD
PC IN
PC LD WRD RD
PC 1 IR
#040 / LEA MA 00
PC Y 1 RD
AX SX IR
PC RD
PC 1 IR
#050 / LEA MA 01
PC Y 1 RD
AX SX IR
PC RD
PC 1 IR
#060 / ST X
AX NO SX WR RD
AC WR
PC RD
PC 1 IR
#070 / ST A+-
IX Y SX WR RD
AC WR
PC RD
PC 1 IR
#100 / BCC #
IX TST
PC RD
PC 1 IR
PC
/ TRUE
PC LD SX RD
PC 1 IR
#110 / SCC
IX TST
PC 1 Y RD
IX LD 0 IR
PC
/ TRUE
PC 1 Y RD
IX LD SX IR
#120 / SHIFT X 6
IX SFT
IX SFT
IX SFT
IX SFT
IX SFT
PC 1 Y RD
IX SFT IR
#130 / SHIFT
PC 1 Y RD
IX SFT IR
#140 / MEM %
PC 1 Y RD
AX OP IR
#150 / MEM #
PC 1 Y RD
AC OP SX IR
#160 / MEM X
AX NO SX RD
PC IN
PC 1 Y RD
AC OP WRD IR
#170 / MEM A+
IX SX Y RD
PC IN
PC 1 Y RD
AC OP WRD IR
/ TRAP DON'T CARE IR RDPUT
/ PUSH (PC-1), P=1
#240 / TRAP
SP 1 SUB WR RD
PC 1 SUB WR
PC LD 1 RD
PC 1 IR
#340 / TRAP
SP 1 SUB WR RD
PC 1 SUB WR
PC LD 1 RD
PC 1 IR
#250 / TRAP
SP 1 SUB WR RD
PC 1 SUB WR
PC LD 1 RD
PC 1 IR
#350 / TRAP
SP 1 SUB WR RD
PC 1 SUB WR
PC LD 1 RD
PC 1 IR
#260 / TRAP
SP 1 SUB WR RD
PC 1 SUB WR
PC LD 1 RD
PC 1 IR
#360 / TRAP
SP 1 SUB WR RD
PC 1 SUB WR
PC LD 1 RD
PC 1 IR
#270 / TRAP
SP 1 SUB WR RD
PC 1 SUB WR
PC LD 1 RD
PC 1 IR
#370 / TRAP
SP 1 SUB WR RD
PC 1 SUB WR
PC LD 1 RD
PC 1 IR
// PANEL
#200 / IDLE
PC
PC
PC
PC IR
#300 / IDLE
PC
PC
PC
PC IR
// PANEL
#210 / ALD
PC NO LD OP RD
PC IN
PC LD WRD
PC IR
#310 / ALD
PC NO LD OP RD
PC IN
PC LD WRD
PC IR
#220 / EXAM
PC 1 Y RD
PC IN
PC
PC IR
#330 / EXAM
PC 1 Y RD
PC IN
PC
PC IR
#230 / DEP
PC NO LD OP RD
PC IN
PC 1 Y WR RD
PC LD NO WRD WR IR
#330 / DEP
PC NO LD OP RD
PC IN
PC 1 Y WR RD
PC LD NO WRD WR IR
*
FILES and chips
"JTRAP" irq and counter 1
"JALU" alu decode 2
"JCON" control logic 3
"JMEM" memory logic 4
"JMLX" a,b reg logic 5
"JMX?" 1,2,3 input mulx 9 wide 6 7 8
"JROMA" pal - prom a 9
"JROMB" pal - prom b 10
74act14 x 1 inverter 11
74act00 x 1 nand 12
74act823 x 2 ir reg 13 14
74act823 x 4 in reg 15 16 17 18
74act823 x 4 out reg 19 20 21 22
2901C x 1 4 bit slice 23
7C9101 x 2 16 bit slice 24 25
*
// ALL DONE
A Cmos computer, with 25 chips for the main board ( alu and control logic ). Power down from 8 amps to 1 amp. Simple front panel, but no blinky lights. Having 9 bit wide registers and buffers is so nice. Ben.
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| Sat Jun 10, 2023 4:18 am |
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BigEd
Joined: Wed Jan 09, 2013 6:54 pm
Posts: 1852
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Nice - do you plan to build it?
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| Sat Jun 10, 2023 6:45 am |
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oldben
Joined: Mon Oct 07, 2019 2:41 am
Posts: 860
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BigEd wrote: Nice - do you plan to build it? I do plan to build it, at some point. At the moment am gathering collecting parts, mostly from ebay. It is the mechanical parts like switches and leds and connectors that need to played with now for the mother board and front panel layout. I am also in need of a good schematic capture and PCB lay out program that is Imperal not metric in layouts and footprints. I guess I got about 1500 pins per pcb at 8" x 11". I have budget of about $500 Canadian for that. Mechanical construction is my weak point, as all I have the kitchen table and a good soldering iron, and a old drill. Ben.
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| Sat Jun 10, 2023 8:10 am |
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robfinch
Joined: Sat Feb 02, 2013 9:40 am
Posts: 2407
Location: Canada
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Quote: I am also in need of a good schematic capture and PCB lay out program
that is Imperal not metric in layouts and footprints. I guess I got about Have you had a look at KiCAD? I believe it supports either set of measurements. _________________Robert Finch http://www.finitron.ca
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| Sun Jun 11, 2023 11:29 am |
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oldben
Joined: Mon Oct 07, 2019 2:41 am
Posts: 860
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Kicad seems still have a footprint problem, and is meteric based. What it I want to use .156 inch spacing connectors, and card edge connectors, or Yang Foo switchs. If sombody came up with a standard library for items like that it would consider it a valid option. Often I want to design a schematic segment, and leave detals like footprints for later. What if part XYX needs a footprint changed later on the PCB lay out. A 7475 vs 74275. I want to start drawing schematics, not makeing components for incomplete libraries, since version #1. This includes old TTL, and other logic, not some new transistor with 5000 lay out patterns, Can kicad import net lists? Can I have design template, so I can start a PCB with the BASIC power and ground and finger routing all done, like a S100 card with fingers and voltage regulators. I want good manual routing, not flaky auto routing. Ben. PS: I also want a game pad as input device for schematic layout. (RS) X to kill that logic bug.  To me it makes sense, as game pad has ample buttons for layout, not ALT SHIFT RIGHT FUNCTION 742 to end a line. PPS: I dislike Kicad, for the simple reason they keep revising to a new version every other year, and libraries keep changing. I sill have a few .156 card edge connectors, Yang FOO switches and plan to use fingers on the PCB.
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| Sun Jun 11, 2023 4:13 pm |
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