Hi Ed and All,

For some time I have been working on an interactive, interpreted Forth-like language for the MSP430 - and I have set myself the artificial target of making it fit into 1024 bytes of MSP430 assembly language.

The reason i chose the MSP430 was simply because it was a very ordinary 16-bit processor, with 16 registers and a very orthogonal instruction set of just 27 instructions - in other words, it only takes a few hours to learn its assembly language.

Subsequently I came across the OPC project - and it became very clear that architecturally the MSP430 was very similar to the OPC6 ISA - suggesting that any code written in MSP430 should be an easy port to the OPC6.

I started coding the SIMPL language in MSP430 assembler in January when I had some holiday - I am currently 8 days in a rural property in Valencia, Spain - where a friend and I are having a "coding week" plus a bit of cycling.

I'm trying to get SIMPL (serial interpreted minimal programming language) stable on the MSP430 before porting to the OPC6.

If anyone else wants to contribute to a <1024 byte interactive programming language - especially porting to OPC6 - I'll put the latest up on github with a few guidance notes.

Best wishes from Valencia


Ken

That certainly sounds interesting to me!

Hi Ed,

TI have just introduced a new "Launchpad" dev board based on their MSP430FR2433 microcontroller.

This is based on ferro-electric memory or FRAM and has 16K of FRAM and 4K of SRAM, as well as 19 GPIO

TI are offering this devboard under special offer at the moment for just $4.30 - more details here.....

http://www.ti.com/lsds/ti/store/msp430- ... &undefined



Ken

(I see I bought a very cheap launchpad back in 2012 - good value, but never yet used. That was the ARM-based "Stellaris® LM4F120 LaunchPad Evaluation Board")

FRAM is interesting: nearly full speed, random access, non-volatile. Reminds me of core memory, and the total memory in this little offering is about right for a very early computer too.

(I note that FRAM, like core, needs to write-after-read. But it's not magnetic, as such, it's using a 'non-linear dielectric')

Hi Ed,

The LaunchPad from 2012 is based on their value line cpu the MSP430G2533 - that has just 16K of Flash and 0.5K of RAM.

The FRAM based launchpad - is generally being viewed as the logical successor to this older low cost model - with a cpu with 15.5K of FRAM and 4K of RAM.

Despite the G2 LaunchPad having only 512 bytes of RAM - I have found it more than adequate to write simple programs - and it also encourages a minimalist approach. There has been at least one version of Forth written for the G2 LaunchPad.

Unfortunately, TI have not marketed their MSP430 range very well over the years - they could have adopted a more standard naming convention for their peripheral registers, plus a common pin-out across different family members. As such you have to virtually start again when you move between family members.

Whilst for many years it was once best in class for very low power consumption, it is losing it's position to the likes of the more modern ARM M0+, and trying to compete in the crowded $1 to $2 price range.

It however remains an uncluttered 16-bit general purpose RISC core, and a good target for "experiments in language". There's a soft core written for it in verilog - which would allow it to be incorporated into FPGAs.


Ken