Tor wrote:
People have used that book to build an actual PDP-8.
The book focuses on Top Down Design - and makes use of Algorithmic State Machines.
The architecture and logic design of the PDP-8 is covered in sufficient detail in Chapter 7 - and proceeds to present the design of a machine they called the LD-20 which would run PDP-8 code.
Unfortunately the book does not have the detailed schematics of the LD-20 - as these were available in another publication cited in the book. If anyone has a link to these documents I would be interested in how the design was physically implemented on a pcb.
Reading through the design detail - the implementation of the PDP-8 appears to be somewhat complex - and if you look at the cpu board of an early 1970s PDP-8/A it contains about 115 ICs.
Some of these may have been necessary because of the drive requirements of magnetic core memory - but I think even the PDP-8 appears overly complex - compared to some of the TTL processors discussed on this forum.
Any insights appreciated.
Ken